Built With
| lowinertia |
Saad Syed
Computer Engineering
Waterloo, ON
ABOUT ME
I am a Computer Engineering student at the University of Waterloo. I specialize in FPGA development, processor design, and building scalable web applications. I combine strong technical skills with clear communication abilities, having worked as a technical writer for major technology companies while pursuing advanced coursework in computer and reconfigurable architecture and embedded systems.
Matrix Vector Multiplication Engine + Activation Unit
• Designed and implemented a pipelined Matrix-Vector Multiplication (MVM) engine in SystemVerilog, inspired by Microsoft Brainwave’s deep learning inference accelerator.
• Optimized for throughput and latency using DSP48e1 slices, capable of...
PYNQ-Z1 FPGA
SystemVerilog
AMD/Xilinx Vivado
Digital Hardware Design
Machine Learning Accelerator