hero-image
HOME
hero-image

Project Timeline

Jun 2025 - Jun-2025

OVERVIEW

Implemented an FSM based audio player that reads audio samples stored in Flash memory and streams them to the onboard DAC at a 22kHz rate. Designed a secondary FSM for address generation and playback control (pause, direction, and speed) based on keyboard inputs. Communicated between the two FSMs using the start-finish protocol. Integrated a PicoBlaze soft processor to compute real-time audio strength via averaging the absolute value of 256 audio samples. Wrote the signal processing logic in PicoBlaze assembly to maintain precise timing and close hardware interaction.

SKILLS

SystemVerilogDigital Signal ProcessingFPGAIntel Quartus PrimePicoBlaze Assembly

Additional Details


lowinertia
Portfolio Builder for Engineers
Created by Aram Lee
© 2025 Low Inertia. All rights reserved.